The present invention relates to a flash memory cell and method of manufacturing the same. In particular, the present invention relates to a flash memory cell and method of manufacturing the same in which a circular hole is formed in an insulating film formed on a silicon substrate and a cylindrical floating gate is formed within the hole, thus improving the integration degree of the device.
Generally, the non-volatile memory device finds a variety of application. A lot of study has been made to a mass storage memory that is one of them since it is superior to the magnetic mass storage means such as a hard disk, a floppy disk etc. in view of power consumption, size and operating speed etc. However, a study on the magnetic mass storage means has been developed to a level having a Giga byte memory capacity, while the nonvolatile memory has been developed to a level a 64M, 256M byte memory capacity. Therefore, in order to develop a non-volatile memory device having more memory capacity than the magnetic mass storage means, it is a prerequisite that the size of the chip has to be reduced.
The flash memory device that is one of these non-volatile memory devices has the function of electrical program and erase, and the memory cell of the flash memory device may be classified into a stack type and a split type depending on what type of gate electrode they have.
A conventional flash memory cell having the stack-type gate electrode will be explained by reference to FIG. 1.
As shown in FIG. 1, the conventional flash memory cell has a gate electrode in which a tunnel oxide film 2, a floating gate 3, a dielectric film 4 and a control gate 5 are stacked on a silicon substrate 1 on which a field oxide film (not shown) is formed, wherein source and drain 6A and 6B into which impurities are injected are each formed on the silicon substrate 1 on both side of the gate electrodes.
In the conventional flash memory cell constructed as above, upon a program, erase or read operation, respective bias voltages are applied to the silicon substrate 1, the control gate 5, the source and 6A and 6B, respectively. The control gate 5 used as a word line and the drain 6B connected to the bit line, are constituent elements necessary to select one of the memory cells. Also, the source 6A is used as a current supply. Therefore, upon all the operations including program, erase and read, the source 6A and the silicon substrate 1 are connected to the ground. Due to these operational characteristics, in the conventional flash memory device, the source 6A occupies about 20% of the area in unit cell. Therefore, in order to reduce the size of the device, the area of the source 6A has to be reduced. However, there is limit reduce the area of the source 6A using the current technology.
It is an object of the present invention to solve the problems involved in the prior art, and to provide a flash memory cell and method of manufacturing the same in which a circular hole is formed in an insulating film formed on a silicon substrate and a cylindrical floating gate is formed within the hole, thus overcoming the above problems.
To achieve the above object, the flash memory cell according to the present invention is characterized in that it comprises a silicon substrate on which a junction area is formed; a floating gate formed in the shape of a cylinder on the junction area of the silicon substrate and electrically separated from the silicon substrate by a tunnel oxide film; and a control gate formed on the floating gate, the portion inserted into the floating gate being formed in the shape of a cylinder and electrically separated from the floating gate by a dielectric film.
To achieve the above object, the method of manufacturing a flash memory cell according to the present invention is characterized in that it comprises the steps of forming first and second insulating films on a silicon substrate and patterning the second and first insulating films sequentially to form a circular hole so that a given portion of the silicon substrate can be exposed; forming a tunnel oxide film on the silicon substrate exposed within the hole and then forming a floating gate having a spacer shape on a side wall of the hole; injecting impurities into the silicon substrate exposed within the hole to form a junction area, and then forming a dielectric film on the floating gate; and depositing polysilicon on the entire upper surface so that the hole can be buried and then patterning the resultant to form a control gate.